Quizzes¶
约 1051 个字 5 张图片 预计阅读时间 4 分钟
Quiz 1¶
-
Represent the decimal number 75 as a 7-bit binary number:
( 1 ), and as a BCD code:( 2 ). Then add an even parity bit at the most significant bit (MSB) of the BCD code to form a 9-bit code:( 3 ). -
Simplify the Boolean expression \(XY + \bar{X}Z + X\bar{Y} + \bar{Y}Z\) to its minimum number of literals:
- A: \(Y + Z\)
- B: \(X + Z\)
- C: \(X + Y\)
- D: \(X + Y + Z\)
-
Which of the following expressions has its dual equal to its complement?
- A: \(\bar{A} + BC\)
- B: \(\bar{A}B + BC\)
- C: \(\bar{A}\bar{B} + BC\)
- D: \(\bar{A}B + A\bar{B}\)
-
What is the sum-of-minterms (SOM) form of the expression \(F(A,B,C) = \bar{A}B + BC\)?
- A: \(\sum m(2,3,7)\)
- B: \(\sum m(0,1,4)\)
- C: \(\sum m(2,4,6)\)
- D: \(\sum m(2,3,6)\)
Answer
-
As below:
- Binary Code: \(1001011_2\)
- \(75 = 64 + 11\)
- BCD Code: \(0111\ 0101\)
- 9-bit Code (Even Parity): \(1\ 0111\ 0101\)
- Binary Code: \(1001011_2\)
-
B (\(X + Z\))
- D (\(\bar{A}B + A\bar{B}\))
- \(f^D(x, y, z) = \bar{f}(x, y, z) = f^D(\bar{x}, \bar{y}, \bar{z}) \Longleftrightarrow f(x, y, z) = f(\bar{x}, \bar{y}, \bar{z})\)
- A (\(\sum m(2,3,7)\))
Quiz 2¶
-
For the function \(F = AB(C+D)+C(BD'+\bar{A}D)\), the literal cost is:
( 1 ), and the gate input cost with NOT (GN) is:( 2 ). -
Find the essential prime implicants for \(F(W,X,Y,Z)= \sum m(0,1,4,6,7,8,9,12,14,15)\):
- A: \(Y'Z', XZ'\)
- B: \(\bar{X}\bar{Y}, XY\)
- C: \(XY, XZ'\)
- D: \(Y'Z', \bar{X}\bar{Y}\)
-
Find a minimal sum-of-products (SOP) expression for the function \(F\) with the don’t-care conditions: \(F(A,B,C,D)=\sum m(1,5,6,13,14)+ \sum d(4,12)\):
- A: \(B\bar{C}+\bar{A}\bar{C}D+BCD'\)
- B: \(B\bar{D}+B\bar{C}+\bar{A}\bar{C}\)
- C: \(\bar{C}D+B\bar{C}+B\bar{D}\)
- D: \(B\bar{C}+B\bar{D}+\bar{A}\bar{C}D\)
-
How many implicants, prime implicants (PI), and essential prime implicants (EPI) are there in \(F(A,B,C)=\sum m(0,4,5)+ \sum d(1)\)?
- A: 8, 1, 1
- B: 7, 1, 1
- C: 6, 1, 1
- D: 5, 3, 1
Answer
-
As below:
- Literal cost: 9
- Gate input cost with NOT (GN): 17
-
B (\(\bar{X}\bar{Y}, XY\))
- D (\(B\bar{C}+B\bar{D}+\bar{A}\bar{C}D\))
- A (8, 1, 1)
- Implicants: 3 + 4 + 1 = 8.
- PI/EPI: Combined term \(\bar{C}\) covers all required minterms.
Quiz 3¶
-
Find the \(t_\text{PHL}\) from input C to the output D, assuming \(t_\text{PHL}=0.20\text{ ns}\) and \(t_\text{PLH}=0.36\text{ ns}\) for each gate.
-
Consider a 4-input priority encoder with inputs \(D_3\), \(D_2\), \(D_1\), \(D_0\). The encoder responds to the most significant 1 (highest priority to \(D_3\)). It produces outputs \(A_1\), \(A_0\) and a valid flag \(V\), where \(V=1\) indicates at least one input is 1. What is the logic expression for \(V\)?
- A: \(D_3D_2 + D_1D_0\)
- B: \(D_3D_2 + D_1 + D_0\)
- C: \(D_3D_2D_1 + D_0\)
- D: \(D_3 + D_2 + D_1 + D_0\)
-
Please find the logic expression of output \(F\) in the figure.
-
What specific Boolean function does the PLA implement for \(F_2\)?
Answer
- C (0.76 ns)
- D (\(D_3 + D_2 + D_1 + D_0\))
- B (\(\bar{X}\bar{Y} + XY\))
- B (\(\bar{C}+\bar{A}\bar{B}\))
Quiz 4¶
-
For the decimal number \((-32)_{10}\) represented as an 8-bit signed binary number:
- The signed-magnitude representation is
( 1 ); - The signed-1's complement representation is
( 2 ); - The signed-2's complement representation is
( 3 ).
- The signed-magnitude representation is
-
Given two 4-bit signed 2's complement numbers, \(A=(0100)_2\) and \(B=(1101)_2\):
- The result of \(A-B\) is
( 1 ); - Does overflow occur?
- The result of \(A-B\) is
-
Which of the following statements about latch and flip-flop behavior is CORRECT?
- A: Metastable state in a latch occurs when both inputs (S and R) are held at logic 0, causing the outputs to oscillate indefinitely.
- B: Oscillation in a basic SR latch happens when both inputs are 0 and then return to 1 simultaneously, leading to an undefined or endless switching state if gate delays are equal.
- C: 1s catching is a problem in edge-triggered D flip-flops, where a brief glitch on the D input during the clock edge can cause an incorrect output.
- D: A metastable state is a stable, long-term condition that can be intentionally used to store an intermediate logic value.
-
As the sequential circuit shown below, determine its input equation, output equation, and next state equation.
-
The timing parameters for the gates and flip-flops are as follows: NOT Gate: \(t_{pd}=0.75\text{ ns}\); XOR Gate: \(t_{pd}=3.0\text{ ns}\); AND Gate: \(t_{pd}=1.5\text{ ns}\); Flip-flop: \(t_{pd}=3.0\text{ ns}\), \(t_s=1.25\text{ ns}\), \(t_h=0.5\text{ ns}\). Find the longest path delay from positive clock edge to an external output, and the maximum frequency of operation of the circuit.
Answer
-
10100000, 11011111, 11100000
- \(32=(00100000)_2\).
- Signed-magnitude: sign bit 1 plus magnitude 0100000 gives 10100000.
- 1's complement: invert 00100000 gives 11011111.
- 2's complement: add 1 to 11011111 gives 11100000.
-
0111, overflow does not occur
- \(A=4\), \(B=-3\), so \(A-B=4-(-3)=7=(0111)_2\).
-
B
- C (\(D=X+Y, Z=X\oplus Y, Q(t+1)=D\))
- D (7.5 ns, 125 MHz)
- Clock-to-output longest path: \(3.0+3.0+1.5=7.5\text{ ns}\).
- Register-to-register critical period: \(3.0+3.0+0.75+1.25=8.0\text{ ns}\), so \(f_{\max}=125\text{ MHz}\).




